MC74HC165ADTR2G | AEC-Q100 Registro de desplazamiento MC74HC165ADTR2G, 74HC, 8 bits Serie/Paralelo a serie 16 pines TSSOP 1

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AEC-Q100 Registro de desplazamiento MC74HC165ADTR2G, 74HC, 8 bits Serie/Paralelo a serie 16 pines TSSOP 1

Fabricado por: On Semiconductor

Datasheet

The MC74HC165A is identical in pin out to the LS165. The device inputs are compatible with standard CMOS outputs, with pullup resistors, they are compatible with LSTTL outputs. This device is an 8-bit shift register with complementary outputs from the last stage. Data may be loaded into the register either in parallel or in serial form. When the Serial Shift/Parallel Load(bar) input is low, the data is loaded asynchronously in parallel. When the Serial Shift/Parallel Load(bar) input is high, the data is loaded serially on the rising edge of either Clock or Clock Inhibit. The 2-input NOR clock may be used either by combining two independent clock sources or by designating one of the clock inputs to act as a clock inhibit.

Tags: Semiconductores, Lógica Estándar, Circuitos integrados (IC) de contadores.